1.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Method for comparing customer and test load data with comparative functional coverage hole analysis
\nInventors:\u00a0 D Blue, S. Ur
\nPatent 7,636,871 in US (2009)<\/p>\n
2.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Using code motion and write and read delays to increase the probability of bug detection in concurrent systems
\nInventors: M Biberstein, E Farchi, S. Ur
\nPatent 7,712,081 in US (2010)<\/p>\n
3.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Facilitating simulated purchases of items by virtual representations of participants in computer-based simulations
\nInventors: S. Ur
\nPatent 7,580,888 in US (2010)<\/p>\n
4.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Testing parallel applications using code instrumentation
\nInventors:\u00a0 M Biberstein, E Farchi, S. Ur
\nPatent 7,574,697 in US (2009)<\/p>\n
5.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Semi-automated desk checking system and method
\nInventors:\u00a0 E. Farchi, F Shachar, A Hayardeny, S. Ur
\nPatent 7,546,589 in US (2009)<\/p>\n
6.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: EFFICIENT PRESENTATION OF FUNCTIONAL COVERAGE
\nRESULTS
\nInventors:\u00a0 K. Zohar, H.\u00a0 Azatchi, S.\u00a0 Ur, E.\u00a0 Marcus, A. Ziv
\nPatent 7,389,215 in US (2008)<\/p>\n
7.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: AUTOMATIC INSPECTION TOOL
\nInventors: E. Farchi, G. Inness,\u00a0 S. Ur
\nPatent 7,512,618 in US (2006)<\/p>\n
8.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: PROBABILISTIC REGRESSION SUITES FOR FUNCTIONAL VERIFICATION
\nInventors:\u00a0 S. Fine, S. Ur, S. Rushton, A. Ziv
\nPatent 7,729,891 in US (2010)<\/p>\n
9.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: SEARCHING ELECTRONIC MAIL AND MESSAGES
\nInventors:\u00a0 Y. Arbetman, A. Levi, S. Ur,
\nPatent 7,529,803 in US (2009)<\/p>\n
10.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: DETERMINING MINIMAL SETS OF BUG SOLUTIONS FOR A COMPUTER PROGRAM
\nInventors:\u00a0 M.\u00a0 Biberstein, E. Farchi, S. Ur
\nPatent 7,412,692 in US (2008)<\/p>\n
11.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: IMPACT CHECKING TECHNIQUE
\nInventors:\u00a0 M. Farkash, S. Ur,
\nPatent 7322016 in US (2008)<\/p>\n
12.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: LATE BINDING OF VARIABLES DURING TEST CASE GENERATION FOR HARDWARE AND SOFTWARE DESIGN
\nVERIFICATION
\nInventors:\u00a0 S. Ur, A. Ziv
\nPatent 7003420 in US (2006)<\/p>\n
13.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: TESTING PARALLEL APPLICATIONS USING CODE INSTRUMENTATION
\nInventors:\u00a0 M.\u00a0 Biberstein, E.\u00a0 Farchi, Y. Nir-buchbinder, S. Ur,
\nPatent 7,574,697 in US (2009)<\/p>\n
14.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: RACE DETECTION FOR PARALLEL SOFTWARE
\nInventors:\u00a0 E. Farchi, S. Ur,
\nPatent 6851075 in US (2005)<\/p>\n
15.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: METHOD A METHOD AND SYSTEM FOR COMBINING MULTIPLE SOFTWARE TEST GENERATORS
\nInventors:\u00a0 E.\u00a0 Farchi, P.\u00a0 Kram, Y. Shaham-Gafni, S. Ur
\nPatent 7,272,752 in US (2007)<\/p>\n
16.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: A METHOD AND SYSTEM FOR INTEGRATING TEST COVERAGE MEASUREMENTS WITH MODEL BASED TEST
\nGENERATION
\nInventors:\u00a0 E.\u00a0 Farchi, D.\u00a0 Geist, A.\u00a0 Hartman, P.\u00a0 Kram, K. Nagin,
\nY. Shaham-Gafni, S. Ur
\nPatent 7272752 in US (2007)<\/p>\n
17.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: INTERLEAVING BASED COVERAGE MODELS FOR CONCURRENT AND DISTRIBUTED SOFTWARE
\nInventors:\u00a0 E. Farchi, S. Ur, A. Ziv
\nPatent 6779135 in US (2004).<\/p>\n
18.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: AUTOMATIC DISPATCH OF MOBILE SERVICES
\nInventors:\u00a0 S. Ur,
\nPatent 6615046 in US (2003).<\/p>\n
19.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: COMPUTER- IMPLEMENTED METHOD AND SYSTEM FOR AUTOMATICALLY INVOKING A PREDETERMINED DEBUGGER COMMAND AT A DESIRED LOCATION OF A SINGLE THREAD OF A PROGRAM
\nInventors:\u00a0 Y. Talmor, E. Farchi, S.\u00a0 Ur, A. Ziv
\nPatent 6978444 in US (2005).<\/p>\n
20.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: METHOD AND SYSTEM FOR PRESENTING DATA STRUCTURES GRAPHICALLY
\nInventors:\u00a0 D. Orell, S. Ur,
\nPatent 6373484 in US (2002).<\/p>\n
21.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: INTEGRATED CIRCUIT TEST COVERAGE EVALUATION AND ADJUSTMENT MECHANISM\u00a0\u00a0 AND METHOD
\nInventors:\u00a0 C. Geer, R. Kalla, J.M., Meyer, S. Ur,
\nPatent 6212667 in US (2001).<\/p>\n
22.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: USING OCR TO ENTER GRAPHICS AS TEXT INTO THE CLIPBOARD
\nInventors:\u00a0 S. Ur,
\nPatent 6249283 in US (2001).<\/p>\n
23.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: COVERAGE MEASUREMENT TOOL FOR USER DEFINED COVERAGE MODELS
\nInventors:\u00a0 A. Gluska, Y. Malka, S. Ur, A. Ziv
\nPatent 6356858 in US (2002).<\/p>\n
24.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: IMPROVEMENTS IN PRINTING
\nInventors:\u00a0 A Yair, S. Ur
\nPatent 5813771 in US (1998).<\/p>\n
25.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Method and system for identifying the source of documents generated by software and documents generated thereby
\nInventors:\u00a0 S. Ur
\nPatent 6072871in US (2000).<\/p>\n
26.\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Method and system for identifying documents generated by an unauthorized software copy
\nInventors:\u00a0 S. Ur
\nPatent 5568550 in US (1996).<\/p>\n","protected":false},"excerpt":{"rendered":"
1.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Method for comparing customer and test load data with comparative functional coverage hole analysis Inventors:\u00a0 D Blue, S. Ur Patent 7,636,871 in US (2009) 2.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 Title: Using code motion and write and read delays to increase the probability … Continue reading